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Silicom PE210G1SPI9A-XR

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Silicom PE210G1SPI9A-XR
Silicom 1 x SFP+ port 10GbE NIC, Intel 82599ES based, low profile PCIE2 x8, no transceiver

In stock



Key Features
Fiber 10 Gigabit Ethernet 10GBASE-SR:
· 10 Gigabit Fiber Ethernet port supports
· 10Gigabit 850nM Small form Factor Pluggable (SFP+)

Fiber 10 Gigabit Ethernet 10GBASE-LR:
· 10 Gigabit Fiber Ethernet port supports 10GBASE-LR (1310nM LAN PHY)
· 10 Gigabit 1310nM Small form Factor Pluggable (SFP+)

Fiber Gigabit Ethernet 10GBASE-SRD:
· Dual rate (1 Gigabit and 10 Gigabit) Fiber Ethernet port supports 10GBASE-SR and 1000Base-SX (850nM LAN PHY)
· 10 Gigabit 850nM Small form Factor Pluggable (SFP+)

Fiber Gigabit Ethernet 10GBASE-LRD:
· Dual rate (1 Gigabit and 10 Gigabit) Fiber Ethernet port supports 10GBASE-LR and 1000Base-LX (1310nM LAN PHY)
· 10 Gigabit 1310nM Small form Factor Pluggable (SFP+)

Host Interface
· PCI Express X8 lanes
· Support PCI Express Base Specification 2.0 (5GT/sec)
· Low-Profile Adapter
· Low power
· LC connector

Performance Features
· IPV4 and IPV6 Supports for IP/ TCP and IP/UDP Receive Checksum offload
· Fragmented UDP checksum offload for Packet Reassembly
· CPU utilization- the 82599 supports reduction in CPU utilization, mainly by supporting Receive Side Coalescing (RSC)
· Support for 16 virtual machine Device Queues ( VMDq) per port
· Support Direct Cache Access ( DCA)
· Advanced memory architecture reduces latency by preceding TSO packets. A TSO packet may be interleaved with other packets going to the wire
· Minimized device I/O interrupts using MSI and MSI-X
· Offload of TCP / IP / UDP checksum calculation and TCP segmentation
· Large on chip receive packet buffer (512 KB)
· Large on chip transmit packet buffer (160KB)
· Supports the VPD (Vital Product Data) capability defined in the PCI specification ver. 3.0
· Time sync- IEEE1588- Precision Time Protocol (PTP)
· Supports the BCN (Backward Congestion Notification) protocol in addition to the EEDC functionality

LAN Features
· IEEE 802.x flow control support
· IEEE 802.q VLAN tagging support
· Supports a mode where all received and sent packets have at least one VLAN tag in addition to the regular tagging
· IEEE 802.1p layer 2 priority encoding
· Jumbo Frame (up to 16KB).
· Link Aggregation and Load Balancing.
· RFC2819 RMON MIB statistics
· TCP Segmentation Offload Up to 256KB
· Ipv6 Support for IP/TCP Receive Checksum Offload
· DDP Offload
· LEDs indicators for link/Activity and speed.

Security Features
· IEEE P802.1AE LinkSec specification. It incorporates an inline packet crypto unit to support both privacy and integrity checks on a packet by packet basis. The transmit data path includes both encryption and signing engines. On the receive data path it includes both decryption and integrity checkers
· IPsec off load for a given number of flows
· Off-load IPsec for up to 1024 Security associations (SA) for each of TX and RX
· AH and ESP protocols for authentication and encryption
· AES-128-GMAC and AES-GCM crypto engines
· Transport mode encapsulation
Additional Information

Additional Information

Manufacturer Silicom
Name Silicom PE210G1SPI9A-XR
Country Israel
Network Type Ethernet
Form Factor SFP+
Number of Ports 1
Connector Type SFP+ cage
Server Exp. Slot PCIe Gen2 x8
ASIC/FPGA Type Intel 82599
Call For Price Yes

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